1. Technical Field
This invention relates to digital to analog (D/A) conversion in data line driver subsystems for flat panel active matrix displays such as thin-film transistor liquid crystal displays TFT-LCD). More specifically, it relates to the type of display which receives its pixel data in digitally encoded form and converts the digital data to analog data line signals in each data driver circuit.
2. Background Art
In the above mentioned displays the number of colors or gray levels that can be precisely displayed is limited in part by the precision and accuracy of the D/A conversion. For economic reasons, more than one hundred data driver circuits, along with associated digital circuitry, must be integrated into each monolithic silicon chip. This requirement eliminates from consideration most of the conventional means of achieving high D/A performance.
Among the more effective schemes for data line circuit D/A conversion is the sampled ramp or sampled staircase method, which is disclosed in U.S. Pat. No. 4,766,430 to Gillette et al. In this method, a ramp or staircase waveform, having a waveshape designed to provide a required nonlinear response, is distributed to all of the data line drivers. In each driver, the instantaneous amplitude of the ramp is captured and held at an instant of time corresponding to the particular digital word at each driver circuit during each display line time. The sample and hold switch which captures the ramp level usually consists of an NMOS or CMOS series switch and a hold capacitor which is usually the capacitance of a display data line. This sample and hold switch has been a weak link in this scheme. Among its limitations are the output dc level is the same as the input; and the charging current For the capacitor comes from the analog input source, thus loading the input. The analog ramp is distributed from a single generator to a large number of data line drivers, and so the generators are loaded by a very large total capacitance.
As another consequence of the foregoing, multiple stages of sample/hold cannot be cascaded without charge-sharing errors, unless buffer amplifiers are provided between stages. This creates difficulty in using analog pipelining without introducing excessive error. Further, in high bandwidth sample/hold applications such as display data drivers, the transistor channel becomes wide, leading to so-called pedestal errors due to coupling of the control signal through stray capacitance and injection into the output of charge stored in the transistor channel. Dummy switches and operational amplifiers are often added for optimal performance, but would be impractical in the display application due to the large number of circuits on each chip.
In the present application, as the number of pixels in the display and the number of gray levels becomes larger, the bandwidth, precision and accuracy required of the sampling switch increase. Due to the limitations cited above, no sampled ramp data driver circuits have been designed which satisfy near-future display requirements.
Another requirement of liquid crystal displays is that the voltage waveform appearing across the cell in .response to the pixel data have a negligible average dc component. This is achieved at present in either of two ways. A first approach shifts the voltage applied to the data lines at intervals such that, relative to a fixed voltage applied to the common liquid crystal electrode, the net voltage across the liquid crystal effectively reverses at that interval. A second approach achieves the net reversal in part by applying a square-wave drive to the common electrode to shift its voltage intervals. The latter approach is used to reduce the voltage requirement of the data line drivers.